ARM has unveiled its next-generation multi-core micro-architecture designed to boost the performance and efficiency of multi-core Cortex-A processors, which form the basis of many mobile and server SoCs. Known as DynamIQ, the new technology will be heading to automotive, smart home, smartphone, and other connected device markets in the near feature.
ARM’s DynamIQ architecture builds on its earlier big.LITTLE with the ability to mix up to eight cores of differing performance/power ratios, while also adding instructions created to accelerate AI and ML applications.
This means that rather than shifting resources between two clusters, each designed with different memory, performance and energy efficiency targets in mind, DynamIQ allows for the same and greater flexibility in a single cluster. Rather than having four Cortex-A73 cores in one cluster and four low power A53s in another, with DynamIQ SoC designers can pair any combination of ARM cores, such as the A73, A72, A53, etc together on a single cluster with a shared a memory pool.
Importantly, each CPU core’s voltage, operating frequency, and sleep state can be controlled individually, which allows for fine-grain control over performance and power consumption. Other IP blocks, such as accelerators, also appear to be able to gain low latency access to the cluster, which could be used to boost performance of security or other processing components inside an SoC that are connected to the CPU.